Three AI board families, three different limits
Accelerator baseboards, cluster switches and rack power shelves use 16–32, 18–28 and 6–14 layers respectively, and each is limited by a different physical effect. We quote them as three separate material problems.
| Board | Typical layers · thickness | First limit | Material response |
|---|---|---|---|
| AI accelerator / GPU baseboard | 16–24 · 2.4–3.6 mm 20–32 · 3.2–5.0 mm (package > 60 mm) | Channel loss and BGA warpage | Very-low or ultra-low-loss CCL on signal layers; T-glass outer cores under the package |
| Cluster switch / NIC (800G–1.6T) | 18–28 · 3.0–4.5 mm | Channel loss and skew across long SerDes routes | Ultra-low-loss CCL, spread glass, HVLP3 foil on 224G layers |
| Rack power shelf / busbar board | 6–14 · 3.0–6.0 mm | z-axis expansion on PTH barrels, current density | 7628 multi-ply cores, 2–6 oz copper, wrap plating; T-glass above 3.0 mm |
CCL loss grades used on AI boards
Three of the six laminate loss grades Tecsply specifies, M6 (Df 0.003–0.005 at 10–14 GHz), M7 (0.002–0.003) and M8 (below 0.002), cover almost every signal layer on an AI board. The rows below are taken from our full CCL table; the plane and power layers inside the same board can use a lower grade.
| Loss grade | Df @ 10 GHz | Dk @ 10 GHz | Representative CCL | Where we specify it |
|---|---|---|---|---|
| Low loss (M6 grade) | 0.003–0.005 | 3.3–3.7 | Megtron 6 class (R-5775(N): 3.34 / 0.0037 @ 13 GHz) | 56G PAM4; power/ground planes inside AI boards where signal layers use a lower-loss grade |
| Very low loss (M7 grade) | 0.002–0.003 | 2.9–3.4 | Megtron 7, Tachyon 100G, EM-890K class | 112G PAM4; PCIe Gen5/Gen6; 112G-generation accelerator and switch boards |
| Ultra low loss (M8 grade) | < 0.002 | 2.9–3.2 | Megtron 8, Astra MT77, EM-892K class | 224G PAM4; 224G-generation accelerator baseboards and 1.6T switches |
Dielectric loss scales roughly with Df × √Dk × frequency × trace length. On a 20 cm 112G channel, moving from Megtron 6 to Megtron 7 class recovers about 1.2 dB of dielectric loss, and at that point conductor loss from the copper foil is the larger term, so we quote the signal layers and the plane layers as two separate material decisions.
Material mapping for 56G, 112G and 224G PAM4
A PAM4 lane's Nyquist frequency is half its baud rate, so a 106.25 Gb/s "112G" lane is evaluated at 26.56 GHz and a 212.5 Gb/s "224G" lane at 53.13 GHz, and each doubling of data rate moves the board up one laminate loss grade. The table summarizes the default construction we open a 56G, 112G or 224G stackup review with.
| Lane | Nyquist | CCL grade | Signal-layer glass | Thin-dielectric style | Copper foil |
|---|---|---|---|---|---|
| 56G PAM4 | 13.3 GHz | M6 (Megtron 6 class) | NE-glass / L-glass | 1078 / 1080 | Per channel length |
| 112G PAM4 | 26.6 GHz | M7 (Megtron 7 / Tachyon 100G / EM-890K class) | NE-glass / L-glass, spread | 1067 / 1078 | Per channel length |
| 224G PAM4 | 53.1 GHz | M8 (Megtron 8 / EM-892K / Astra MT77 class); PTFE on channels over 25 cm | NE-glass / L-glass, spread | 1027 / 1037 | HVLP3 or better |
Our loss budget estimator runs the same first-order model we use in the first call: dielectric loss from Df and Dk, conductor loss from trace width with a frequency-dependent copper-roughness correction, compared against an IEEE channel budget. Use it to see which grade a given channel length needs before you commit to a laminate.
Mixed-glass stackups: NE-glass for the lanes, T-glass for the package
An AI accelerator board with packages over 80 mm on a side needs low-Dk glass on its signal layers and low-CTE glass under its BGA field, because a board that bows by even 0.2 mm across the package opens solder joints during reflow. The lanes want NE-glass or L-glass for loss and skew. The package wants T-glass, whose coefficient of thermal expansion is about 2.8 ppm/°C against 5.6 ppm/°C for E-glass, and whose tensile modulus is about 15% higher (86 vs 75 GPa).
The practical answer is a mixed stackup: low-Dk cloth on the signal-pair layers, low-CTE cloth in the outer cores under the package, and a fabricator who can laminate both in one press cycle without registration drift. Two cloths with different expansion and resin uptake behave differently in the press, so the fabricator has to qualify the combination, not each cloth alone. We check that qualification before we place the order, and we record which layer carries which cloth on the stackup drawing.
T-glass has its own supply constraint. Production-grade T-glass cloth is dominated by a single Japanese supplier, with Taiwanese producers recently qualified, so lead time is checked before a mixed-glass stackup is frozen. See the T-glass guide for the full glass-type comparison.
Fiber-weave skew above 25 Gbps
Fiber-weave skew closes the eye on differential pairs at 56G and above, and Tecsply specifies spread glass by default on any board above 25 Gbps to limit it. A trace running over a glass yarn sees a higher local Dk than one running over resin between yarns; when the two legs of a pair see different Dk, they arrive at different times.
Three measures reduce it, and they stack. Spread-glass styles (1067, 1078, 3313) flatten the yarn so the Dk under a trace is more uniform. Low-Dk glass narrows the gap between glass Dk and resin Dk, so even an uneven weave matters less. Rotated-panel or zig-zag routing adds a further margin by making each leg cross the weave at an angle. On 224G layers we typically combine all three with the thinnest spread styles, 1027 and 1037.
Copper foil roughness at 112G and 224G
At 224G PAM4 the skin depth in copper at the 53 GHz Nyquist frequency is about 0.29 µm, so foil roughness drives conductor loss as much as the laminate's Df does. We specify HVLP3 or better on 224G signal layers and treat foil grade as a line item on the stackup, not a fabricator default. The FAQ below covers how we model it.
Rack power and busbar boards
AI rack power shelves typically run 6 to 14 layers at 3.0 to 6.0 mm total thickness with 2–6 oz copper, which makes z-axis expansion on plated through-hole barrels the main reliability risk. We build them on 7628 multi-ply cores, specify wrap plating on PTH, and consider T-glass once total thickness passes 3.0 mm. The loss grade on these boards follows any adjacent signal layer rather than the power layers themselves.
AI compute FAQ
These four questions come up in almost every AI board stackup review; the full list is on the FAQ page.
Which CCL loss grade does a 112G or 224G PAM4 board need?
112G PAM4 channels (Nyquist 26.56 GHz) are typically built on M7-grade very-low-loss CCL with Df around 0.002–0.003 at 10–14 GHz (Megtron 7, Tachyon 100G, EM-890K class). 224G PAM4 (Nyquist 53.13 GHz) moves to M8-grade ultra-low-loss laminates below 0.002 (Megtron 8, EM-892K, Astra MT77 class) and, on the longest channels, PTFE-based materials such as RO3003. Plane layers inside the same board can use a lower grade.
What is fiber-weave skew and how does glass style affect it?
A trace running over a glass yarn sees a higher local Dk than one running over resin between yarns. On a differential pair this shows up as skew, which closes the eye at 56G and above. Spread-glass styles (1067, 1078, 3313) flatten the yarn so the Dk is more uniform; low-Dk glass narrows the gap between glass and resin Dk; rotated-panel or zig-zag routing adds a further margin. We specify spread glass by default on any board above 25 Gbps.
Is T-glass the same as low-Dk glass?
No. T-glass is defined by low CTE (about 2.8 ppm/°C) and high modulus (about 86 GPa), not by its dielectric properties: its Dk is about 5.4 and its Df about 0.0043 at 1 GHz, higher loss than E-glass (Nittobo published values). Low-Dk glass such as NE-glass has a Dk of about 4.8 at 1 GHz against 6.8 for E-glass, with a CTE of about 3.3 ppm/°C but a lower modulus (about 64 GPa). Some suppliers offer low-CTE, low-Dk hybrid cloths, and current AI boards often combine both types in one stackup.
How much does HVLP copper foil roughness matter at 224G PAM4?
At 224G PAM4 the Nyquist frequency is about 53 GHz, where the skin depth in copper is about 0.29 µm, so signal current flows in a layer thinner than the tooth profile of standard or reverse-treated foil. Surface roughness lengthens the current path and raises conductor loss, by up to about 2× for foil much rougher than the skin depth, and at these frequencies conductor loss on a 4–5 mil stripline is usually larger than the dielectric loss of an M8-grade laminate. That is why upgrading the laminate alone recovers less than the Df numbers suggest.
Our loss-budget estimator models this with the Hammerstad–Jensen roughness correction, which grows with frequency, using planning RMS roughness values from about 2.0 µm for standard ED foil down to about 0.25 µm for HVLP3-class foil (specified at Rz ≤ 1.1 µm). We specify HVLP3 or better on 224G signal layers and confirm the foil grade and inner-layer bonding treatment on the stackup drawing, because the bonding treatment adds roughness of its own.
Check a channel, then send us the board
Run your longest lane through the loss estimator, then send the data rate, package size and layer count for a stackup review with named CCL and glass constructions.
References
- Panasonic MEGTRON 6(N) / 7(N) / 8(N), Isola Tachyon 100G / Astra MT77 and EMC EM-890K / EM-892K supplier datasheets: Dk/Df at 10–14 GHz.
- IEEE 802.3ck and 802.3dj: 100GBASE-KR1 and 200GBASE-KR1 channel insertion-loss limits.
- Nittobo Electronic Materials: glass cloth types (E, NE, T) and style thickness tables.
- E. Bogatin, Signal and Power Integrity – Simplified: first-order dielectric and conductor loss approximations.
- NCAB Group PCB Supply Chain Outlook, September 2026; AtlasPCB material cost and lead-time reporting, July–August 2026.