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Copper clad laminate (CCL): choosing the loss grade

Copper clad laminate is the cured sheet of glass-cloth reinforcement and resin with copper foil bonded to one or both sides. It becomes the core of a multilayer PCB; uncured sheets of the same glass-and-resin system (prepreg) bond the cores together. The resin system sets the dielectric constant (Dk), dissipation factor (Df), glass transition temperature (Tg) and z-axis expansion of the finished board.

Last reviewed Tecsply Inc. engineeringAbout 1,500 words

What CCL does inside a multilayer board

In a 16-layer board built by foil construction, seven CCL cores and eight prepreg layers make up nearly all of the dielectric, so the laminate family chosen for them sets the electrical and thermal behavior of the whole board. The fabricator etches the inner-layer circuits into the copper on each core, stacks the cores with prepreg between them, adds copper foil on the outside, and presses the stack under heat and pressure until the prepreg resin flows, fills the etched copper and cures.

Because the cores and the prepreg come from the same glass-and-resin system, the board behaves as one material. That is why the first line on any Tecsply stackup is the laminate family, not the layer count. Layer count, board size and surface finish drive price; the laminate drives whether the board meets its channel budget and survives its thermal environment.

The four properties a laminate decides

Four laminate properties decide most of a high-reliability board's behavior: Dk and Df at the operating frequency, glass transition temperature (Tg), and z-axis expansion together with decomposition temperature (Td). Each one is set mainly by the resin system, and adjusted by the glass cloth and the resin content.

  • Dielectric constant (Dk) sets signal propagation speed and, together with dielectric thickness and trace width, characteristic impedance. Lower Dk means a thinner dielectric for the same impedance.
  • Dissipation factor (Df) sets how much signal energy the dielectric absorbs per cycle. Dielectric loss rises in direct proportion to frequency, so Df becomes the dominant laminate property above a few GHz.
  • Glass transition temperature (Tg) is where the resin changes from a rigid to a softer state and its expansion rate rises sharply. A higher Tg keeps the board stiffer through soldering and operating temperature.
  • z-axis expansion and Td describe how much the board grows through its thickness when heated, and at what temperature the resin starts to decompose. These two govern plated through-hole reliability through reflow, rework and thermal cycling.

Six loss grades, from FR-4 to PTFE

Tecsply classifies laminates into six loss grades by dissipation factor at 10–14 GHz, from standard-loss FR-4 above Df 0.010 to PTFE laminates near 0.001, following the M6 / M7 / M8 grade shorthand the laminate industry uses. The table below is the grade map we quote from.

Supplier datasheet values at 10–14 GHz; "M6/M7/M8" is the industry loss-grade shorthand. Representative datasheet points: Megtron 7(N) 3.31 / 0.0023 and Megtron 8(N) 3.13 / 0.0016 @ 14 GHz; Tachyon 100G 3.02 / 0.0021, EM-890K 2.9 / 0.0024, EM-892K 2.9 / 0.0017 and Astra MT77 3.00 / 0.0017 @ 10 GHz. Exact Dk/Df depends on glass style, resin content and copper roughness; we confirm against the supplier datasheet for the specific construction on every quote.
Loss gradeDf @ 10 GHzDk @ 10 GHzRepresentative CCLFitsWhere we specify it
Standard loss (FR-4)> 0.0103.6–4.3High-Tg FR-4 (Tg 170–180 °C), 370HR classBothPower, control and low-speed I/O boards; aerospace boards below ~5 Gbps where Class 3 reliability, not loss, is the driver
Mid loss0.005–0.0103.7–4.2Megtron 4 classBoth10–25 Gbps NRZ; PCIe Gen4; radar and avionics data buses
Low loss (M6 grade)0.003–0.0053.3–3.7Megtron 6 class (R-5775(N): 3.34 / 0.0037 @ 13 GHz)AI56G PAM4; power/ground planes inside AI boards where signal layers use a lower-loss grade
Very low loss (M7 grade)0.002–0.0032.9–3.4Megtron 7, Tachyon 100G, EM-890K classAI112G PAM4; PCIe Gen5/Gen6; 112G-generation accelerator and switch boards
Ultra low loss (M8 grade)< 0.0022.9–3.2Megtron 8, Astra MT77, EM-892K classAI224G PAM4; 224G-generation accelerator baseboards and 1.6T switches
PTFE / ceramic-filled0.001–0.0043.0–3.5RO3003 (PTFE, 3.00 / 0.0010), RO4350B (hydrocarbon-ceramic, 3.48 / 0.0037)AeroPhased-array and radar RF sections; hybrid stackups where one or two RF layers sit over an FR-4 or Megtron core

We name laminates by class ("Megtron 7 class", "M7 grade") rather than by a single product, because several suppliers publish materials with overlapping Dk and Df at a given grade. The class name tells the fabricator which performance window the board was designed for; the specific product is agreed in the stackup review based on the fabricator's qualified materials and current allocation.

How to read a loss grade

Dielectric loss scales roughly with Df × √Dk × frequency × trace length, so a laminate with one-tenth the Df of FR-4 cuts dielectric loss per centimeter by about 10× or more at the same frequency. On a 20 cm 112G channel at 26.56 GHz, moving from Megtron 6 to Megtron 7 class (Df 0.0037 → 0.0023) recovers about 1.2 dB of dielectric loss, and moving on to Megtron 8 class (0.0016) recovers roughly another 0.7 dB. On a channel near its limit, that margin can decide whether a retimer is needed.

Two cautions apply when comparing grades. First, the Df in a datasheet is measured on a specific construction and resin content; a thin, resin-rich prepreg and a thick, glass-rich core of the same family can differ, which is why we confirm the value for the exact construction. Second, dielectric loss is only part of the channel. Conductor loss, which depends on trace width and copper foil roughness, grows with the square root of frequency and at 112G and 224G is often larger than the dielectric term on M7 and M8 laminates. A laminate upgrade that ignores the foil recovers less than the Df numbers suggest. The loss budget estimator shows both terms side by side, and the copper foil selection guide compares foil grades.

Signal layers and plane layers are two decisions

On a 24-layer AI baseboard, many dielectric layers sit between power and ground planes rather than under high-speed signal pairs, so specifying the whole stackup in the grade the fastest lane needs overpays for every plane layer. We quote the signal layers and the plane layers as two separate material decisions: the signal-pair dielectrics in the grade the channel requires, and the power and ground layers in a lower grade from a compatible family.

The constraint is compatibility. Mixing laminate families in one press cycle requires resin systems that cure under the same profile and expand similarly, so we pair grades within a supplier family or use combinations the fabricator has already qualified. The result is documented on the stackup drawing, layer by layer, so the material declaration on the shipment matches what was designed.

Thermal properties matter first on aerospace boards

For a thermal-cycling aerospace board, the first CCL question is not Df but z-axis CTE and Td. We specify Tg ≥ 170 °C, Td ≥ 340 °C and z-CTE below 3% total expansion (50–260 °C) on any board that will see lead-free rework, and polyimide when the operating envelope passes 200 °C.

Those three numbers protect plated through-holes. Every time the board heats, the resin expands through the board's thickness and stretches the copper barrel; a laminate with lower total expansion and a decomposition temperature well above the soldering profile keeps that strain within what the plating can survive for 1,000 cycles between −55 °C and +125 °C. On these boards a standard- or mid-loss high-Tg FR-4 is usually correct even when a lower-loss material would be available, because loss is not the limit. See the aerospace page for the full build envelope.

Hybrid stackups with PTFE and ceramic-filled laminates

PTFE and ceramic-filled laminates with Df near 0.001 are specified for phased-array and radar RF sections, usually as one or two RF layers bonded over an FR-4 or Megtron core rather than as a full stackup. PTFE is softer, drills and plates differently, and costs substantially more than epoxy-based laminates, so it is placed only where the RF path needs it. For 224G PAM4 channels longer than about 25 cm, PTFE-based materials are also the fallback when an M8-grade laminate cannot close the budget. RO4350B-class hydrocarbon-ceramic laminates (Df ≈ 0.0037 at 10 GHz) are easier to process than PTFE and serve many radar layers where the absolute lowest loss is not required.

Supply and lead time in 2026

Electronic-grade glass cloth prices rose by more than 100% year on year in 2026 and CCL by roughly 70%, with high-speed laminate production lead times stretching from 12–18 days to 18–25 days. AI server demand for high-layer-count boards is consuming glass cloth and copper foil capacity, and industry outlooks expect capacity relief to begin only in late 2027. We lock material allocation with our fabricators on framework agreements rather than order by order, and we check laminate availability before a stackup is frozen, not after the purchase order.

How to specify CCL on a fabrication drawing

A fabrication drawing that names only "FR-4" or "low loss" leaves 4 of the 6 decisions above to the fabricator, so Tecsply stackups call out each of the following explicitly.

  1. Laminate class or family for signal layers and for plane layers, with an "or equivalent" rule that states the Dk/Df window at a named frequency.
  2. Glass style and ply count for every core and prepreg, which fixes dielectric thickness and resin content. See the thickness guide.
  3. Glass type where it matters: NE-glass or L-glass on high-speed layers, T-glass under large packages. See the T-glass guide.
  4. Copper foil type and weight per layer, including roughness grade on high-speed layers.
  5. Minimum Tg, Td and z-axis expansion when the board sees lead-free assembly, rework or thermal cycling.
  6. CAF-resistant laminate on Class 3 builds.

Each of these becomes a line on the material declaration that ships with the board, which is how a buyer can confirm lot by lot that what was built is what was designed.

Get a named CCL construction for your board

Send the fastest lane rate, largest package and operating environment. We return a stackup with the laminate named layer by layer.

References

  1. Panasonic Megtron, Isola Tachyon/Astra, Rogers RO3003/RO4350B and EMC EM-890K/EM-892K supplier datasheets: Dk/Df at 10–14 GHz, Tg, CTE.
  2. Panasonic MEGTRON 6 R-5775(N) (Apr 2022), MEGTRON 7 R-5785 (2022) and MEGTRON 8 R-5795 datasheets; EMC EM-890K and EM-892K datasheets (Jul 2024); Rogers RO4350B datasheet.
  3. E. Bogatin, Signal and Power Integrity – Simplified: first-order dielectric and conductor loss scaling.
  4. IPC-6012 (rigid PCB qualification and performance).
  5. NCAB Group PCB Supply Chain Outlook, September 2026; AtlasPCB material cost and lead-time reporting, July–August 2026.

Last reviewed . Values are typical published figures for stackup planning.